I am an MTS SDE at AMD’s FPGA Architecture team. I work on a variety of applications for next-generation FPGA devices. My Ph.D. research focuses on improving FPGA design productivity, creating a development experience for FPGAs that aligns closely with widely accepted software design principles.

I go by DJ, an abbreviation for the full name DongJoon.

• Ph.D. in EE, University of Pennsylvania
  • Advisor: Prof. André DeHon
  • Thesis: Software-like Incremental Refinement on FPGA using Parital Reconfiguration
• B.S. in ECE, Carnegie Mellon University